I2S Transmitter and I2S Receiver:LogiCORE IP Product Guide
■The Xilinx® LogiCORE™ IP I2S Transmitter and LogiCORE™ Receiver cores are soft Xilinx IP cores for use with the Xilinx Vivado® Design Suite, which makes it easy to implement the inter-IC-sound (I2S) interface used to connect audio devices for transmitting and receiving PCM audio.
●Features
■AXI4-Stream compliant
■Supports up to four I2S channels (up to eight audio channels)
■16/24-bit datawidth support
■Supports master I2S mode
■Configurable FIFO depth
■Supports the AES channel status extraction/insertion
■Supports left and right justified I2S
■Optional 32-bit LRCLK support
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User's Guide |
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Please see the document for details |
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English Chinese Chinese and English Japanese |
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November 10, 2021 |
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v1.0 |
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PG308 |
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607 KB |
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