W956D8MBYA / W956A8MBYA 64Mb HyperRAM
●Interface: HyperBus
●Power supply: 1.7V~2.0V or 2.7V~3.6V
●Maximum clock rate: 200MHz
●Double-Data Rate (DDR) Up to 400 MT/s
●Clock:
■Single ended clock (CK)
■Differential clock (CK/CK#)
●Chip Select (CS#)
●8-bit data bus (DQ[7:0])
●Hardware reset (RESET#)
●Read-Write Data Strobe (RWDS)
■Bidirectional Data Strobe / Mask
■Output at the start of all transactions to indicate refresh latency
■Output during read transactions as Read Data Strobe
■Input during write transactions as Write Data Mask
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W956D8MBYA 、 W956A8MBYA 、 W956D8MBYA5I 、 W956D8MBYA6I 、 W956A8MBYA5I 、 W956A8MBYA6I |
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Datasheet |
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Please see the document for details |
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TFBGA;TFBGA24 |
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English Chinese Chinese and English Japanese |
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Sep. 02, 2021 |
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Revision: A01-004 |
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772 KB |
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