300 W, Wide Mains, PFC Stage Driven by the NCP1654 Application Note
■The NCP1654 is a Power Factor Controller to efficiently drive Continuous Conduction Mode (CCM) step−up pre−converters. As shown by the ON Semiconductor application note AND8322, “Four Key Steps to Design a Continuous Conduction Mode PFC Stage Using the NCP1654”, which details the four key steps to design a NCP1654 driven PFC stage, this circuit represents a major leap towards compactness and ease of implementation.
■Housed in a SO−8 package, the circuit minimizes the external components count without sacrificing performance and flexibility. In particular, the NCP1654 integrates all the key protections to build robust PFC stages like an effective input power runaway clamping circuitry.
■When needed or wished, the NCP1654 also allows operation in Follower Boost mode to drastically lower the pre−converter size and cost, in a straight−forward manner. For more information on this device, please refer to the ON Semiconductor data sheet NCP1654/D.
■The board illustrates the circuit capability to effectively drive a high power, universal line application. More specifically, it is designed to meet the following specifications:
◆Maximum output power: 300 W
◆Input voltage range: from 85 VRMS to 265 VRMS
◆Regulation output voltage: 390 V
◆Switching frequency: 65 kHz
■This application was tested using an active load. As in many applications, the PFC controller is fed by an output of the downstream converter, there is generally no need for an auto−supply circuitry. Hence, in our demo board, the NCP1654 VCC is to be supplied by a 15 V external power supply.
■The external voltage source that is to be applied to the NCP1654 VCC, should exceed 10.5 V typical, to allow the circuits start up. After start up, the VCC operating range is from 9 V to 20 V.
■The voltage applied to the NCP1654 VCC must NOT exceed 20 V.
■The NCP1654 is a continuous conduction mode and fixed frequency controller (65 kHz). The coil (650 uH) is selected to limit the peak to peak current ripple in the range of 36 % at the sinusoid top, in full load and low line conditions. Again, for details on how the application is designed, please refer to the ON Semiconductor application note AND8322, ”Four Key Steps to Design a Continuous Conduction Mode PFC Stage Using the NCP1654”.
■As detailed in the document, the board yields very nice Power Factor ratios and effectively limits the Total Harmonic Distortion (THD).
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Application note & Design Guide |
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Please see the document for details |
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SO−8 |
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English Chinese Chinese and English Japanese |
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October, 2009 |
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Rev. 2 |
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AND8324/D |
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730 KB |
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