AD210032F-x 1Gb LPDDR2 datasheet

2022-05-13
●Features
■DLL is not implemented
■Low power consumption
■JEDEC LPDDR2-S4B compliance
■Partial Array Self-Refresh (PASR)
■Auto Temperature Compensated Self-Refresh (ATCSR) by built-in temperature sensor
■Deep power-down mode
■Double-data-rate architecture; two data transfers per one clock cycle
■The high-speed data transfer is realized by the 8 bits prefetch pipelined architecture
■Differential clock inputs (CK and -CK)
■Commands entered on each positive CK edge; data and data mask referenced to both edges of DQS
■Data mask (DM) for write data

AP Memory

AD210032F-xAD210032FAD210032F-XTAD210032F-ABAD325616DXTAB

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LPDDR2 RAM

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Datasheet

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Sep. 07, 2021

Rev. 1.2b

2.2 MB

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