DE1-SoC Development Kit

2022-03-24
The DE1-SoC Development Kit presents a robust hardware design platform built around the Altera System-on-Chip (SoC) FPGA, which combines the latest dual-core Cortex-A9 embedded cores with industry-leading programmable logic for ultimate design flexibility. Users can now leverage the power of tremendous re-configurability paired with a high-performance, low-power processor system. Altera’s SoC integrates an ARM-based hard processor system (HPS) consisting of processor, peripherals and memory interfaces tied seamlessly with the FPGA fabric using a high-bandwidth interconnect backbone. The DE1-SoC development board is equipped with high-speed DDR3 memory, video and audio capabilities, Ethernet networking, and much more that promise many exciting applications.
■Features
●The DE1-SoC development board
●DE1-SoC Quick Start Guide
●USB cable(Type A to B)for FPGA programming and control
●USB cable (Type A to Mini-B) for UART control
●12V DC power adapter
●Altera Cyclone® V SE 5CSEMA5F31C6N device
●Altera serial configuration device –EPCQ256
●USB-Blaster II onboard for programming; JTAG Mode
●64MB SDRAM(16-bit data bus)
●4 push-buttons
●10 slide switches
●10 red user LEDs
●Six 7-segment displays
●Four 50 MHz clock sources from the clock generator
●24-bit CD-quality audio CODEC with line-in, line-out, and microphone-in jacks
●VGA DAC (8-bit high-speed triple DACs) with VGA-out connector
●TV decoder (NTSC/PAL/SECAM) and TV-in connector
●PS/2 mouse/keyboard connector
●IR receiver and IR emitter
●Two 40-pin expansion header with diode protection
●A/D converter, 4-pin SPI interface with FP
●800 MHz Dual-core ARM Cortex-A9 MPCore processor
●1 GB DDR3 SDRAM (32-bit data bus)
●1 Gigabit Ethernet PHY with RJ45 connector
●2-port USB Host, normal Type-A USB connector
●Micro SD card socket
●Accelerometer (I2C interface + interrupt)
●UART to USB, USB Mini-B connector
●Warm reset button and cold reset button
●One user button and one user LED
●LTC 2x7 expansion header
●Cyclone V SoC 5CSEMA5F31 Device
●Dual-core ARM Cortex-A9 (HPS)
●85K programmable logic elements
●4,450 Kbits embedded memory
●6 fractional PLLs
●2 hard memory controllers
●Quad serial configuration device –EPCQ256 on FPGA
●On board USB-Blaster II (normal type B USB connector)
●64MB (32Mx16) SDRAM on FPGA
●1GB (2x256Mx16) DDR3 SDRAM on HPS
●Micro SD card socket on HP
●Two port USB 2.0 Host (ULPI interface with USB type A connector)
●UART to USB(USB Mini-B connector)
●10/100/1000 Ethernet
●PS/2 mouse/keyboard
●IR emitter/receiver
●I2C multiplexer
●Two 40-pin expansion headers
●One 10-pin ADC input header
●One LTC connector(one Serial Peripheral Interface (SPI) Master ,one I2C and one GPIO interface )
●24-bit VGA DAC
●24-bit CODEC, Line-in, Line-out, and microphone-in jack
●TV decoder (NTSC/PAL/SECAM) and TV-in connector
●Fast throughput rate: 1 MSPS
●Channel number: 8
●Resolution: 12-bit
●Analog input range: 0 ~ 2.5 V or 0 ~ 5V as selected via the RANGE bit in the control register
●5 user Keys(FPGA x4, HPS x1)
●10 user switches(FPGA x10)
●11 user LEDs(FPGA x10, HPS x 1)
●2 HPS reset buttons (HPS_RESET_nand HPS_WARM_RST_n)
●Six 7-segment display
●G-Sensor on HP
●12V DC input

友晶科技

5CSEMA5F31C6NDE1-SoC5CSEMA5F31

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Development Kit

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User's Guide

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Please see the document for details

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English Chinese Chinese and English Japanese

03/14/2014

V1.0

9.6 MB

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