SubLVDS to MIPI CSI-2 Image Sensor Bridge Reference Design User Guide
■Many Image Signal Processors (ISP) or Application Processors (AP) use the Mobile Industry Processor Interface (MIPI®) Camera Serial Interface 2 (CSI-2) standard for image sensor inputs. However, some high-resolution CMOS image sensors use a proprietary SubLVDS output format.
■The Lattice Semiconductor SubLVDS to MIPI CSI-2 Image Sensor Bridge reference design for CrossLink™ devices solves the mismatch between SubLVDS output image sensor and an ISP/AP using CSI-2 interface.
●Features
■Supports 4-, 6-, 8-, or 10-lane SubLVDS input to 1-, 2-, or 4-lane MIPI CSI-2 output
■Supports input lane bandwidth of up to 1.2 Gbps (in the case of 4-lane configuration) and output lane bandwidth of up to 1.5 Gbps
■Image cropping option
■Dynamic parameter setting through I²C
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CrossLink 、 CrossLinkPlus 、 LIF-MD6000 、 LIA-MD6000 、 LIF-MDF6000 |
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User's Guide |
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Please see the document for details |
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English Chinese Chinese and English Japanese |
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September2019 |
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Revision 1.1 |
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FPGA-RD-02061-1.1 |
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2.9 MB |
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