Lattice CrossLink-NX ISP Demo Quick Start Guide Application Note
■This document is intended to show you the hardware setup and operation procedures for demonstrating the Image Signal Processing (ISP) reference design features.It is assumed that you are familiar with the basic Lattice FPGA design flow.
■This reference design is developed based on Lattice Embedded Vision Development Kit(EVDK) with CrossLink-NX VIP Sensor Input Board.
■Lattice Embedded Vision Development Kit (EVDK) is comprised of:
▲CrossLink-NX VIP Sensor Input Board
▲ECP5 VIP Processor Board
▲HDMI VIP Output Bridge Board
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CrossLink-NX 、 ECP5 、 LF-EVDK1-EVN 、 ECP5UM |
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VIP Processor Board 、 Embedded Vision Development Kit 、 FPGA 、 VIP Input Bridge Board 、 HDMI VIP Output Bridge Board |
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Application note & Design Guide |
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Please see the document for details |
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English Chinese Chinese and English Japanese |
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September 2021 |
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Revision 1.0 |
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FPGA-AN-02040-1.0 |
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505 KB |
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