Si53320-28 Low-Jitter LVPECL Fanout Clock Buffers with up to 10 LVPECLOutputs from Any-Format Input and Wide Frequency Range fromDC up to 1250 MHz

2021-11-25
●The Si53320–28 family of LVPECL fanout buffers is ideal for clock/data distribution and redundant clocking applications. These devices feature typical ultra-low jitter characteristics of 50 fs and operate over a wide frequency range from dc to 725/1250MHz. Built-in LDOs deliver high PSRR performance and reduce the need for external components, simplifying low-jitter clock distribution in noisy environments.
●The Si53320–28 family is available in multiple configurations, with some versions offering a selectable input clock using a 2:1 input mux. Other features include independent output enable and built-in format translation. These buffers can be paired with the Si534x clocks and Si5xx oscillators to deliver end-to-end clock tree performance
●KEY FEATURES
■Ultra-low additive jitter: 50 fs rms
■Built-in LDOs for high PSRR performance
■Up to 10 LVPECL Outputs
■Any-format Inputs (LVPECL, Low-power LVPECL, LVDS, CML, HCSL, LVCMOS)
■Wide frequency range: dc to 1250 MHz
■Output Enable option
■Multiple configuration options
■Dual Bank option
■2:1 Input Mux operation
■RoHS compliant, Pb-free
■Temperature range: –40 to +85 °C

SKYWORKS

Si53320-28Si5xxSi534xSi53323Si53320Si53327Si53328Si53321Si53326Si53325Si53322Si53320-B-GTSi53321-B-GMSi53321-B-GQSi53322-B-GMSi53323-B-GMSi53325-B-GMSi53325-B-GQSi53326-B-GMSi53327-B-GMSi53328-B-GM

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Part#

Low-Jitter LVPECL Fanout Clock Buffers

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Datasheet

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20-TSSOP;16-QFN;32-QFN;32-eLQFP;24-QFN

English Chinese Chinese and English Japanese

July 26, 20212

Rev. 1.2

3.4 MB

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