Ultra96 (Xilinx ZU3) Camera Mezzanine
■Industry standard 96Boards form factor for development
■Xilinx ZU3 based design
■Mezzanine contains ON’s AP1302 providing the ISP function for the Xilinx FPGA
■Mezzanine enables ability to connect up to x2 ON Semiconductor IAS modules
■Demo shows: IAS1MOD-AR0144CSSM080110-GEVB
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Datasheet |
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Please see the document for details |
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English Chinese Chinese and English Japanese |
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2020/04/04 |
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214 KB |
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