74AHC02; 74AHCT02 Quad 2-input NOR gate Product data sheet
■The 74AHC02; 74AHCT02 is a high-speed Si-gate CMOS device and is pin compatible withLow-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A.
■The 74AHC02; 74AHCT02 provides a quad 2-input NOR function.
●Features and benefit
■Balanced propagation delays
■All inputs have Schmitt-trigger actions
■Inputs accept voltages higher than V-cc
■Input levels:
▲For 74AHC00: CMOS leve
▲For 74AHCT02: TTL level
■ESD protection:
▲HBM EIA/JESD22-A114E exceeds 2000 V
▲MM EIA/JESD22-A115-A exceeds 200 V
▲CDM EIA/JESD22-C101C exceeds 1000 V
■Multiple package options
■Specified from -40 °C to +85 °C and from -40 °C to +125 °C
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74AHC02 、 74AHCT02 、 74AHC02D 、 74AHCT02D 、 74AHC02PW 、 74AHCT02PW 、 74AHC02BQ 、 74AHCT02BQ |
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Datasheet |
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Please see the document for details |
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SO14;TSSOP14;DHVQFN14;SOT108-1;SOT402-1;SOT762-1;076E06;MS-012;MO-153;MO-241 |
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English Chinese Chinese and English Japanese |
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11 May 2020 |
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Rev. 5 |
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74AHC_AHCT02_5 |
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220 KB |
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