74AUP1G19 Low-power 1-of-2 decoder/demultiplexer Product data sheet

2021-06-15
●General description
■The 74AUP1G19 is a 1-to-2 decoder/demultiplexer with a common output enable. This devicebuffers the data on input A and passes it to the outputs 1Y (true) and 2Y (complement) when theenable (E) input signal is LOW. A HIGH E causes both outputs to assume a HIGH state.
■Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.
■This device ensures very low static and dynamic power consumption across the entire VCC rangefrom 0.8 V to 3.6 V.
■This device is fully specified for partial power down applications using IOFF. The IOFF circuitrydisables the output, preventing the potentially damaging backflow current through the device whenit is powered down.
●Features and benefits
■Wide supply voltage range from 0.8 V to 3.6 V
■High noise immunity•Low static power consumption; ICC = 0.9 μA (maximum)
■Overvoltage tolerant inputs to 3.6 V
■Low noise overshoot and undershoot < 10 % of V-CC
■I-OFF circuitry provides partial Power-down mode operation
■Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
■Complies with JEDEC standards:
▲JESD8-12 (0.8 V to 1.3 V)
▲JESD8-11 (0.9 V to 1.65 V)
▲JESD8-7 (1.2 V to 1.95 V)
▲JESD8-5 (1.8 V to 2.7 V)
▲JESD8-B (2.7 V to 3.6 V)
■ESD protection:
▲HBM JESD22-A114F exceeds 5000 V
▲MM JESD22-A115-A exceeds 200 V
▲CDM JESD22-C101E exceeds 1000 V
■Multiple package options
■Specified from -40 °C to +85 °C and -40 °C to +125 °C

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74AUP1G1974AUP1G19GW74AUP1G19GM74AUP1G19GN74AUP1G19GS

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Low-power 1-of-2 decoderLow-power 1-of-2 demultiplexer

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Datasheet

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SC-88;XSON6;SOT363;SOT886;SOT1115;SOT1202

English Chinese Chinese and English Japanese

19 May 2021

Rev. 6

74AUP1G19 v.6

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