NB3N51054 PCIe Clock Generator, Crystal to 100 MHz Quad HCSL / LVDS, 3.3 V
●Features:
■ Uses 25 MHz Fundamental Crystal or Reference Clock Input
■ Four Low Skew HCSL or LVDS Outputs
■ I 2 C Support with Read Back Capability
■ Spread of −0.35%, −0.5% and No Spread
■ Individual Output Enable/Disable Control through I 2 C
■ PCIe Gen 1, Gen 2, Gen 3, Gen 4 Compliant
■ Phase Jitter @ 100 MHz (Integrated 12 kHz to 20 MHz): 0.5 ps
■ Cycle−Cycle Jitter @ 100 MHz (10k cycles): 20 ps
■ Phase Noise @ 100 MHz:
▲Offset Noise Power
▲100 Hz −104 dBc/Hz
▲1 kHz −121 dBc/Hz
▲10 kHz −131 dBc/Hz
▲100 kHz −136 dBc/Hz
▲1 MHz −140 dBc/Hz
▲10 MHz −155 dBc/Hz
■ Operating Power Supply: 3.3 V ±5%
■ Industrial Temperature Range: −40 °C to 85 °C
■ Functionally Compatible with ICS841S104I with enhanced performance
■ These are Pb−Free Devices
[ Networking ][ Consumer ][ Computing and Peripherals ][ Industrial Equipment ][ PCIe Clock Generation Gen 1, Gen 2, Gen 3 and Gen 4 ][ Switch ][ Router ][ Set Top Box ][ LCD TV ][ Servers ][ Desktop Computers ][ Automated Test Equipment ] |
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Datasheet |
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Please see the document for details |
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TSSOP−24 |
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English Chinese Chinese and English Japanese |
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May, 2018 |
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Rev. 5 |
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NB3N51054/D |
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247 KB |
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