Power-UP and Power-Down Characteristics for Digital Potentiometers (DP) DESIGN NOTE
This design note discusses what happens when power (Vcc) is applied or removed from a digital potentiometers in an application circuit.
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Application note & Design Guide |
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Please see the document for details |
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English Chinese Chinese and English Japanese |
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5/29/02 |
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REV. A |
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DN6;6017 |
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105 KB |
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