PACKET HANDLER OPERATION FOR Si446X RFICS Application Note
This application note discusses the operation of the Packet Handler (PH) on the Si446x family of RFICs. Details of operation in both TX mode and RX mode are provided. The purpose of this application note is to expand upon the information available in the data sheets for Si446x devices. This application note does not discuss direct mode or raw data mode (as may be required by legacy systems with non-standard packet structures). A thorough understanding of the topics discussed within this application note will be helpful in construction of a typical packet structure such as that shown in Figure 1.
In order to completely specify the structure of the packet, it is necessary to configure the Preamble, Sync Word,and Data fields. Configuration of these fields is provided by four groups of properties accessible through the API:
• Property Group 0x10xx=Preamble Configuration
• Property Group 0x11xx=Sync Word Configuration
• Property Group 0x12xx=Packet Field Configuration
• Property Group 0x30xx=Match (Header Check) Configuration
Although the PH itself is concerned only with configuration of the Packet Fields (property group 0x12xx), all four property groups are discussed within this document; a thorough understanding of configuration of these groups is required to construct a desired packet structure.
It is assumed that the user has a basic familiarity with the API for the Si446x family of RFICs. All configurations of the PH discussed within this application note are accomplished through the use of published API calls.
The Si446x family of chips contains circuit functionality known as the automatic Packet Handler (PH). The purpose of the PH is to automatically perform basic packet structure construction (in TX mode) or deconstruction (in RX mode), without the need for MCU control or intervention. The usual fields needed for packet generation (such as Preamble and Sync Word) normally change infrequently and can therefore be stored in registers.Automatically adding these fields to the Payload data greatly reduces the required computational power of the MCU, allowing use of a less-complex (i.e., cheaper) MCU.
The PH has little benefit unless the chip is also operated in FIFO mode (as opposed to Direct mode where the bits of the transmit or receive data stream are processed in real-time on a physical input or output pin). Therefore, operation of the chip in FIFO mode is assumed throughout this document, unless noted otherwise.
The functionality of the PH may be enabled or disabled in RX mode. Enabling/disabling of the PH functionality is provided in Property 0x1206 PKT_CONFIG1 by the PH_RX_DISABLE bit D6. However, if the PH is disabled the receiver may only be operated in Direct mode; operation in FIFO mode is not possible. The PH remains enabled at all times in TX mode.
The functionality of the PH includes the following:
• Detection/validation of Preamble quality in RX mode (PREAMBLE_VALID signal)
• Detection of Sync word in RX mode (SYNC_OK signal)
• Detection of valid packets in RX mode (PKT_VALID signal)
• Detection of CRC errors in RX mode (CRC_ERR signal)
• Data de-whitening and/or Manchester decoding (if enabled) in RX mode
• Match/Header checking in RX mode
• Storage of Data Field bytes into FIFO memory in RX mode
• Construction of Preamble field in TX mode
• Construction of Sync field in TX mode
• Construction of Data Field from FIFO memory in TX mode
• Construction of CRC field (if enabled) in TX mode
• Data whitening and/or Manchester encoding (if enabled) in TX mode
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Application note & Design Guide |
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Please see the document for details |
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Rev. 0.2 |
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