The I³C Interface Can Help Improve Performance in Sensor Applications——Started to Implement on Some of Renesas RA Family MCU
In this blog, we're going to do something slightly different and look at a new peripheral, the I³C bus interface, which we have started to implement on some of our newest devices, such as the latest entry-level members of the RA family microcontroller（MCU）, the RA4E2 and RA6E2. You can see the block diagram of the new RA6E2 below.
Block Diagram of the new RA6E2 offering an I³C interface in small pin count devices down to 32 pins
The I³C interface (officially the "MIPI Alliance Improved Inter Integrated Circuit") was initially developed by the MIPI alliance to support sensor interconnect in mobile applications. The MIPI Alliance is a global alliance of electronics companies that develop technical specifications for mobile applications, of which Renesas Electronics is a member.
The original concept behind the I³C interface was to standardize the communication between sensors and the host CPU, reduce the number of physical pins and the interconnect, and support low-power, high-speed communications. The aim was to replace the I²C and SPI busses that are typically used today in these applications and improve the specification. While the initial target was mobile devices, it soon became obvious that the same requirements are suitable for many other applications, where we have simple serial busses providing local interconnect between devices.
The I³C interface solves some of the issues that we have with the existing I²C and SPI buses. The I³C interface offers the following:
Support for higher data rates
Removes the need for additional pins to support chip selects (SPI) or interrupts
Dynamic address
Hot-plug support
The in-band interrupt function is particularly important as this can be used as a low-cost wake-up function and allows devices to enter a low-power shutdown mode while still supporting correct operation on the bus.
Further, I³C can save considerable device power through higher data rates (because the device can be put back to sleep sooner), built-in configuration and control (without intruding on the main communication protocols), In-Band Interrupt (IBI) as a low-cost wake mechanism, and the ability for Targets to shut down all internal clocks while still operating correctly on the I³C interface.
I³C can also save power compared to that used by I²C as the power consumed per bit-transfer is more efficient than that achieved using the I²C bus, this is due to the use of push-pull (vs. Open-Drain) and strong Pull-Up signaling.
I³C offers backward compatibility with the I²C bus, supporting legacy devices and applications. However, some limitations have to be managed, such as the change from the open drain (I²C) to push-pull (I³C) for the clock and data lines and the lack of support for clock stretching, sometimes used to allow some I²C devices time to respond to a data request.
The full MIPI I³C specification is only available for members of the MIPI membership. However, the MIPI I³C basic specification bundles the most common I³C features and is available for use without MIPI membership allowing users to use the I³C interface in their interconnect applications.
The I³C interface provides a comprehensive upgrade to the I²C and SPI busses typically used to connect sensor and host CPUs in many applications today, making it easier to transfer data between these devices, and to reduce the power consumption of the system.
In the next generation of smart sensors, many of which will have local processing requirements to minimize the host CPU load, devices like the RA4E2 and RA6E2 will provide ideal solutions. These devices support small package options like the 4x4mm BGA while supporting the I³C interface, with an extremely high-performance core that makes them very attractive for these new applications.
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