Aeonsemi Unveils ChronoPHY™ Series of Multi-Rate 10G Ethernet PHYs Ethernet Transceivers, Integrating SyncE Jitter Filtering PLL Function

2023-08-22 Aeonsemi News
Ethernet Transceivers,mixed-signal ICs,DSP communications ICs,low-latency physical layer ethernet transceivers

Aeonsemi Unveils ChronoPHY™ Series of Multi-Rate 10G Ethernet PHYs, Industry’s Highest Performing Ethernet Transceivers for Broadband Access, Intelligence Computing, and Industrial Applications.


Aeonsemi, an innovator of mixed-signal ICs and DSP communications ICs, announced today the launch of the ChronoPHY™ series of high-performance, low-latency physical layer ethernet transceivers. The ground-up architecture is designed to meet the bandwidth, synchronization, latency, and robustness requirements of modern networks that enable emerging real-time collaboration, immersive augmented and virtual reality applications. Leveraging an advanced timing architecture, these transceivers can achieve nanosecond network synchronization accuracy and determinism, surpassing competing solutions by over 10 times with great power efficiency. The PHYs also integrate a SyncE jitter filtering PLL function, ensuring reliable link performance and simplified signal integrity design without the need for additional external components.


“High resolution video transmission, streaming, gaming, and AR/VR applications are fueling the demand for faster, lower-latency, and more deterministic networks,” said Yunteng Huang, CEO of Aeonsemi. “With the rollout of WiFi-6, WiFi-7, and 10G broadband access into homes and businesses, the residential and enterprise LAN infrastructure is rapidly upgrading to support multi-gigabit capabilities. The ChronoPHY™ family is specifically positioned to facilitate the adoption of these faster networks, making the convenience and efficiency improvement accessible to everyone across the economic spectrum.”


The ChronoPHY™ series is designed on TSMC’s advanced process node and employs an efficient frequency-domain digital signal processing system architecture. This enables the PHYs to achieve industry-leading cable reach and interference immunity, ensuring robust and reliable performance.


Compliant with IEEE802.3 & IEEE1588 standards, the ChronoPHY™ series is specified over the industrial temperature range of –40℃ to +85℃ with single port options housed in 7mm x 7mm and 11mm x 11mm BGA packages. Samples and evaluation kits are available now with production to start in September.


ChronoPHY™ Series Highlights:

  • 10GBase-T, 5GBase-T, 2.5GBase-T, 1000Base-T, and 100Base-TX

  • IEEE802.3an/802.3bz/802.3ab/802.3u compliant

  • IEEE1588 Precision network synchronization with integrated timing functions

    1ns PTP time stamping resolution

    Flexible reference input clock of 50MHz or 156.25MHz

    Any rate fractional frequency SyncE output clock: 25MHz to 250MHz

    Ultra-low close-in phase noise SyncE PLL


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