MR44V064A 64k Bit(8,192-Word × 8-Bit) FeRAM (Ferroelectric Random Access Memory) I2C
in the ferroelectric process and silicon-gate CMOS technology. The MR44V064A is accessed using Two-wire
Serial Interface ( I2C BUS ).Unlike SRAMs, this device, whose cells are nonvolatile, eliminates battery backup
required to hold data. This device has no mechanisms of erasing and programming memory cells and blocks,
such as those used for various EEPROMs. Therefore, the write cycle time can be equal to the read cycle time and
the power consumption during a write can be reduced significantly.
The MR44V064A can be used in various applications, because the device is guaranteed for the write/read
tolerance of 1012 cycles per bit and the rewrite count can be extended significantly
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Datasheet |
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RoHS |
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Please see the document for details |
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SOP;P-SOP8-200-1.27-T2K |
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English Chinese Chinese and English Japanese |
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Sep. 1, 2017 |
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FEDR44V064A-02 |
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705 KB |
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