U74LVC2G126 DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS CMOS IC
■DESCRIPTION
●The U74LVC2G126 consists of two bus buffers with 3-state output controlled by enable input (nOE), when nOE is low, the output is disabling.
●Inputs can be driven from either 3.3V or 5V devices, so the device can be used in a mix 3.3V/5V system.
●This device is full specified for partial power-down protective circuit, preventing the backflow current through the device when it is powered down.
■FEATURES
●Operation voltage range: 1.65~5.5V
●Support 5V VCC operation
●Low power dissipation
●Input accept voltage to 5.5V
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Datasheet |
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Please see the document for details |
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TSSOP-8;MSOP-8 |
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English Chinese Chinese and English Japanese |
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2018/04/24 |
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QW-R502-231.E |
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275 KB |
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