M88DR5RCD01 Gen1 DDR5 RCD for RDIMM / LRDIMM
●General Description
■M88DR5RCD01 is a Gen1 DDR5 Registering Clock Driver (RCD) for driving address and control nets on DDR5 RDIMM and LRDIMM applications. The RCD is fully compliant with the JEDEC DDR5RCD01 specification and can be used as a central buffer on an RDIMM or LRDIMM to enable higher capacity for the memory systems.
●Feature List
■Fully compliant with JEDEC DDR5RCD01 specification
■Speed up to 4800MT/s
■1.1V VDD and 1.0V VDDIO voltages
■Two channel 1:2 registering buffer for address and control signals
■Integrated PLL clock driver distributing one differential clock pair to five differential pairs per channel
■Dual chip selects
■Parity checking across CA and DPAR separately on two sub-channels
■Output characteristics configurable through control registers
■CA, CS and DFE training modes and Dual Frequency support
■Sideband bus interface supporting I 2 C and I3C Basic modes
■Power saving modes: PDE power down, Self refresh w/wo Clock Stop modes
■Green package: 240-ball FCBGA
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[ RDIMM ][ LRDIMM ][ DDR5 RDIMM ][ DDR5 LRDIMM ] |
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Datasheet |
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Please see the document for details |
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FCBGA |
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English Chinese Chinese and English Japanese |
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2022/11/3 |
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258 KB |
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