Tips and Tricks Using the ADSP-SC57x/ADSP-2157x Processor Boot ROM

2022-08-11
The ADSP-SC57x/ADSP-2157x products (hereafter referred to as ADSP-SC57x) are members of the SHARC+® family of processors. Unlike previous SHARC processors like the ADSP-212xx, ADSP-213xx and ADSP-214xx processors, the ADSP-SC57x/ADSP-2157x processors feature an on-chip boot ROM (mapped to L2 system memory) to control the boot scenario. The boot ROM provides a mechanism via One-Time Programmable (OTP) memory to customize various aspects of the boot process including enabling/disabling of specific features such as: the use of cache memory, overriding default boot peripheral initialization and timing parameters, and disabling of boot modes. For more details on various types of memory inside these processors, refer to the ADSP-SC57x SHARC+ Core Embedded Processor Data Sheet[1].
The non-secure (i.e., “standard”) boot process does not verify any signatures nor perform any decryption on the application's binary boot stream; however, the ADSP-SC57x processor supports secure booting when security is enabled, where the boot kernel uses cryptographic algorithms to perform checks of the application binary and to decrypt it. This EE-note highlights the new boot features and enables the user to create various boot streams and understand how boot customization can be achieved using the boot ROM and OTP memory.

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ADSP-SC57xADSP-2157x

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Processor

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Application note & Design Guide

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October 14, 2020

Rev 1

EE-428

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