R-Series Vybrid Reference Manual
■This document describes the features, architecture, and programming model of the Freescale Vybrid microprocessor (MPU).
●Overview
■This family of devices is Freescale's latest Single Core offering with ARM® Cortex®-A5 based processors.
■These devices are highly integrated reducing system cost for target applications. Main features include
▲Cortex-A5 @400 MHz (1.57 DMIPS/MHz) with TrustZone with 32 KB I-Cache/32KB D-Cache
▲Neon Media Processing Engine (MPE) co-processor and double precision Floating Point Unit (FPU)
▲Cortex-M4 @ 167 MHz with 16 KB I-Cache/16 KB D-Cache
▲1.5 MB on-chip SRAM of which 512 KB optionally supports ECC
▲Support for LPDDR2/DDR3
▲Dual TFT display up to SVGA and optional 40x4 and 38x6 Segmented LCD
▲Dual 10/100 Ethernet
▲Dual USB OTG with on-chip HS PHY and on-chip HS/FS/LS PHY
▲OpenVG 1.1 GPU
▲Advanced Security supporting Symmetric with on-chip Tamper detection
▲Rich set of communication peripherals and general purpose features
▲Advanced digital audio support with multiple audio interfaces and hardware asynchronous sample-rate converter co-processor.
▲Multiple package options that include 176 LQFP, and 364 BGA
■This family of devices is manufactured utilizing 40nm low-power process.
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User's Guide |
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Please see the document for details |
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English Chinese Chinese and English Japanese |
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06/2014 |
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Rev 5 |
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VYBRIDRSERIESRM |
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45.1 MB |
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