Programming BBRAM and eFUSEs Application Note
■The Zynq® UltraScale+™ MPSoC family is based on the Xilinx® UltraScale™ MPSoC architecture. The Zynq UltraScale+ RFSoCs are similar to the basic MPSoCs with the addition of key RF subsystems for multi-band, multi-mode cellular radios, and cable infrastructure. These MPSoC and RFSoC products integrate a feature rich 64-bit quad-core or dual-core Arm® Cortex™-A53 and dual core Arm Cortex R5 based processing system (PS) and Xilinx programmable logic (PL) UltraScale™ architecture in a single device. Nonvolatile memory (NVM) in the form of eFUSEs and battery-backed RAM (BBRAM) is used for advanced encryption standard (AES) keys, Rivest-Shamir-Adleman (RSA) key hashes, security control, and user-defined applications. This application note describes the programming of BBRAM and eFUSEs in Zynq UltraScale+ devices. The capability to program BBRAM and eFUSEs increases the field programmability of Xilinx FPGAs and SoCs. The programming of BBRAM and eFUSEs in Zynq UltraScale+ devices provides ease-of-use and security advantages over the programming capabilities of the Zynq-7000 SoC and UltraScale devices.
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Application note & Design Guide |
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Please see the document for details |
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English Chinese Chinese and English Japanese |
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November 23, 2020 |
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v2.1 |
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XAPP1319 |
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4.4 MB |
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