CIC Compiler v4.0:LogiCORE IP Product Guide

2022-05-28
●Introduction
■The Xilinx® LogiCORE™ IP CIC Compiler core provides the ability to design and implement AXI4-Stream-compliant cascaded integrator-comb (CIC) filters.
●Features
■AXI4-Stream-compliant interfaces
■Decimation or interpolation
■Fixed or programmable rate change from 4 to 8192
■Three to six CIC stages
■One or two differential delays
■Support of signed, twos complement input data from 2 bits to 32 bits
■Full or limited precision output data
■Single or multichannel support for up to 16 channels
■Hardware folding for small footprint implementations
■Optional mapping to DSP48E1 Slices
■Synchronous clear input
■Clock enable input
■Use with Xilinx Vivado® IP Catalog and Xilinx System Generator for DSP

Xilinx

Vivado Design SuiteLogiCORE IP module

More

More

User's Guide

More

More

Please see the document for details

More

More

English Chinese Chinese and English Japanese

February 4, 2021

v4.0

PG140

1.3 MB

- The full preview is over. If you want to read the whole 52 page document,please Sign in/Register -
  • +1 Like
  • Add to Favorites

Recommend

All reproduced articles on this site are for the purpose of conveying more information and clearly indicate the source. If media or individuals who do not want to be reproduced can contact us, which will be deleted.

Contact Us

Email: