DPUCAHX8L for Convolutional Neural Networks

2022-05-23
The Xilinx® Deep Learning Processor Unit (DPU) is a series of soft IP for convolutional neural networks acceleration. The DPUCAHX8L is a low latency CNN inference IP for Alveo™ cards with high bandwidth memory (HBM). It runs with a set of efficiently optimized instructions and it can support most convolutional neural networks, such as VGG, ResNet, GoogLeNet, YOLO, SSD, MobileNet, FPN, etc.
●Features:
■ Supports one AXI slave interface for accessing configuration and status registers.
■ Supports one AXI master interface for code fetch.
■ Supports two AXI master read interface for input feature-map and model parameters loading.
■ Supports one AXI master write interface for feature map output.
■ Supports eight AXI master interfaces for DPUCAHX8L operation with virtual data banks inthe HBM.
■ DPU functionality includes the following:
▲Configurable depthwise convolution engines.
▲Convolution and deconvolution
▲Depthwise convolution
▲Max pooling
▲Average pooling
▲ReLU and ReLU6
▲Concat
▲Elementwise-sum
▲Dilation
▲Reorg
▲Fully connected layer
▲Batch normalization
▲Split

Xilinx

DPUCAHX8L

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Deep Learning Processor UnitDPUprogrammable DPU

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User's Guide

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July 22, 2021

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