Zynq UltraScale+ RFSoC Data Sheet: Overview
■The Zynq® UltraScale+™ RFSoC family integrates key subsystems for multiband, multi-mode cellular radios and cable infrastructure (DOCSIS) into an SoC platform that contains a feature-rich 64-bit quad-core Arm® Cortex™-A53 and dual-core Arm Cortex-R5F based processing system.
■Combining the processing system with UltraScale™ architecture programmable logic and RF-ADCs, RF-DACs, and soft-decision FECs, the Zynq UltraScale+ RFSoC family is capable of implementing a complete software-defined radio including direct RF sampling data converters, enabling CPRI™ and gigabit Ethernet-to-RF on a single, highly programmable SoC.
■Three generations of Zynq UltraScale+ RFSoCs integrate up to 16 channels of RF-ADCs and RF-DACs, all with excellent noise spectral density. The RF data converters also include power efficient digital down converters (DDCs) and digital up converters (DUCs) that include programmable interpolation and decimation, NCO, and complex mixer. The DDCs and DUCs can also support dual-band operation. See Ta b l e 1 for key features and sample rates.
ZU21DR 、 ZU25DR 、 ZU27DR 、 ZU28DR 、 ZU29DR 、 ZU39DR 、 ZU42DR 、 ZU43DR 、 ZU46DR 、 ZU47DR 、 ZU48DR 、 ZU49DR 、 ZU65DR 、 ZU67DR 、 XCZU21DR 、 XCZU25DR 、 XCZU27DR 、 XCZU28DR 、 XCZU29DR 、 XCZU39DR 、 XCZU42DR 、 XCZU43DR 、 XCZU46DR 、 XCZU47DR 、 XCZU48DR 、 XCZU49DR 、 XCZU65DR 、 XCZU67DR 、 XCZU25DR-1FFVE1156E |
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Datasheet |
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Please see the document for details |
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FFVD1156;FFVE1156;FSVE1156;FFVG1517;FSVG1517;FFVF1760;FSVF1760;FFVH1760;FSVH1760 |
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English Chinese Chinese and English Japanese |
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January 7, 2022 |
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v1.13 |
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