MPC184 Descriptor Programmer's Guide-PCI View

PublishTime：2022-04-26

This application note supplements the MPC184 Security Coprocessor User's Manual, PCI Interface, to assist you in understanding and creating descriptors when you have more specific requirements than those covered by the MPC184 device driver. This application note assumes familiarity with the MPC184 architecture, as explained in the user's manual. All descriptor and execution unit references are shown in little endian format consistent with the PCI version of the MPC184 user's manual.
The MPC184 has bus mastering capability on either 32-bit PCI or the PowerQUICC 8xx bus to off-load data movement and encryption operations from a host processor. As the system controller, the host processor maintains a record of current secure sessions and the corresponding keys and contexts of those sessions. Once the host has determined a security operation is required, it can either directly write keys, context, and data to the MPC184 (MPC184 in target mode), or the host can create a 'data packet descriptor' to guide the MPC184 through the security operation, with the MPC184 acting as a bus master. The descriptor can be created in main memory, any memory local to the MPC184, including 8 Kbytes of on-chip gpRAM, or written directly to the data packet descriptor buffer in the MPC184 crypto-channel.

Brand of Product：	NXP
Part#：	MPC184 More Part#
Product Category：	Security Coprocessor More
Application：	More
Data Type：	Application note & Design Guide More
Safety & Environment Standards：	More
Operating Temperature：	Please see the document for details
Qualification Grade：	More
Qualification Approval：	More
Package：
Language：	English Chinese Chinese and English Japanese
Date of Creation：	10/2006
Version Number：	Rev. 1
Data Encoding：	AN2492
Data Size：	755 KB

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