EV10AS180A Low Power L‐Band 10‐bit 1.5GSps ADC ANALOG to DIGITAL CONVERTER
●MAIN FEATURES:
■Single Core ADC Architecture with 10‐bit Resolution Integrating a Selectable 1:1/2/4 DEMUX
■1.5 GSps Guaranteed Conversion Rate
■Differential Input Clock (AC Coupled)
■Analog Input Voltage: 500 mVpp Differential Full Scale (AC Coupled)
■Analog and Clock Input Impedance: 100 Differential
■LVDS Differential Output Data with Swing Adjustment and Data Ready
■Fine Adjustment of ADC Gain, Offset
■Fine Adjustment of Sampling Delay for Interleaving
■Static and Dynamic Test Mode for ADC and DEMUX
■Data Ready Common to the 4 Output Ports
■1.75W Power Dissipation (1:2 Ratio with Standard LVDS Output Swing)
■Power Supply: 5.2V, 3.3V and 2.5V (Output Buffers)
■LGA255, Ci‐CGA255 or CCGA255 Package
EV10AS180A 、 EV10AS180AMGSD/T 、 EV10AS180AMGS9NB1 、 EV10AS180AGS‐EB 、 EV10AS180AMLGD/T 、 EV10AS180AMLG9NB1 、 EV10AS180AMGCD/T 、 EV10AS180AMGC9NB1 、 EV10AS180AMLG 、 EV10AS180AMGC 、 EV10AS80AMGS-V 、 EVX10AS180AGS 、 EVX10AS180ALG 、 EVX10AS180AGC 、 EV10AS180AMLG‐V 、 EV10AS80AMGS‐V 、 EV10AS180AMGC‐V |
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[ Direct L‐band RF Down Conversion ][ Defense Radar Systems ][ Satellite Communication Systems ] |
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Datasheet |
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Please see the document for details |
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LGA255;Ci‐CGA255;CCGA255 |
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English Chinese Chinese and English Japanese |
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11/15 |
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Revision E |
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DS1096;1096E–BDC |
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751 KB |
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