The appetite for quick-access mobile content has always been in demand. With the arrival of the Internet of Things, this demand is continuing to grow. Year on year, the number of connections are increasing, with IHS Markitdata suggesting that the number of connected IoT devices will surge to 125 billion by 2030. At the heart of these connections is the analog-to-digital converter (ADC) which resides in the Analog Front End (AFE). In a recent paper, we discussed the various architectures that are used in AFEs where the main requirement is low latency and low power. We believe that the Successive Approximation Register (SAR) ADC –one of the most energy-efficient, compact, and popular ADC architectures –is the best fit forthose applications. SAR ADC resolution can be as high as 18-bit, making it suitable for high-accuracy measurements. Sampling rates can go up to tens of MS/s (106samples per second). Being a highly flexible and low-power architecture, the SAR ADC is an ideal solution for mobile radio AFEs. However, the demand for always higher bandwidths, driven by internet mobile and broadband data access by consumers, is pushing the sampling rate limits beyond those a SAR ADC can achieve.The millimetre wave technology for 5G cellular network equipment requires converters operating at GS/s (109samples per second). This can be achieved only with time-interleaved ADC architectures. Although such architectures increase the sampling rate limits significantly, they also increase the complexity and require additional calibration algorithms which are not suitable for all applications. We will look at time-interleaved ADCs in more detail in a future paper, but here we will discuss an alternative for those applications and technologies which do not need GS/s, but need more than tens of MS/s. Some of these technologies include LTE-A, NB-IoT, 802.11ax (wireless) or G.Fast, G.hn, DSL (wireline), VSIS (analog video),and even 5G cellular network in the sub-6GHz frequency range. For this significant number of applications and technologies, the answer lies in an evolution of the SAR ADC: the SAR-Assisted Pipeline ADC.The SAR-Assisted Pipeline ADCarchitecture, which combines the architecture of a traditional Pipeline ADC with that of aSAR ADC, extends the SAR ADC max sampling rate and improves energy-efficiency, while keeping all the competitive advantages of the SAR ADC.At Renesas, formerly Dialog, we have been investing for many years in the development of new ADC architectures to support both our customers who license our technology for use in their own systems, and also for our customers who engage with us to bring their product vision to reality through a custom ASIC. Renesashas a comprehensive portfolio of silicon proven SAR-Assisted Pipeline ADCs, available in multiple processes and geometries, and optimized for these technologies.In this article we look in more detail at these architectures and how they are paving the way for the development of the next generation of mobile products.
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