74LVT126 3.3 V quad buffer; 3-state
■The 74LVT126 is a quad buffer/line driver with 3-state outputs controlled by the output enable inputs (nOE). A LOW on nOE causes the outputs to assume a high impedance OFF-state. Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs. This device is fully specified for partial power down applications using I-OFF. The I-OFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
●Features and benefits：
■Quad bus interface
■3-state buffers
■Wide supply voltage range from 2.7 to 3.6 V
■Overvoltage tolerant inputs to 5.5 V
■BiCMOS high speed and output drive
■Output capability: +64 mA and -32 mA
■Direct interface with TTL levels
■Input and output interface capability to systems at 5 V supply
■Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs
■Live insertion and extraction permitted
■No bus current loading when output is tied to 5 V bus
■Power-up 3-state
■I-OFF circuitry provides partial Power-down mode operation
■Latch-up performance exceeds 500 mA per JESD 78 Class II Level B
■Complies with JEDEC standard JESD8C (2.7 V to 3.6 V)
■ESD protection:
▲MIL STD 883 method 3015: exceeds 2000 V
▲MM: exceeds 200 V
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Datasheet |
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Please see the document for details |
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SO14;TSSOP14;DHVQFN14;SOT108-1;SOT402-1;SOT762-1;076E06;MS-012;MO-153;MO-241 |
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English Chinese Chinese and English Japanese |
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27 July 2021 |
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Rev. 6 |
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74LVT126 v.6 |
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236 KB |
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