STM32MP151, STM32MP153 and STM32MP157 discrete power supply hardware integration
■STM32MP151, STM32MP153, and STM32MP157 product lines (referred to as STM32MP15x in this document), are built on an Arm® Cortex®-A7 with single or dual-core combined with an Arm® Cortex®-M4. They are usually powered by the STPMIC1 power management IC companion chip, which is fully featured to supply complete applications.
■This application note describes an alternative solution to supply power to STM32MP15x MPUs with discrete regulators. Only applications supporting the core chipset are covered (STM32MP15x + DDR + Flash memory).
■This application note is intended for hardware product designers and architects who require details about:
◆Detailed schematic block diagrams
◆Low power mode and reset management (crash recovery)
◆Voltage regulator module (VRM) electrical specification for supplying the STM32MP15x power rail.
● Overview
■This application note applies to all STM32MP15x devices, which have a large feature set and stringent power-supply requirements.
■It focuses on the core chipset supplies (STM32MP15x + DDR + Flash memory) with the following assumptions:
◆5 V DC input power source application
◆DDR3L x32-bit bus width with bus termination resistors
◆Generic Flash memory powered from a 3.3 V power source.
■The regulator electrical specifications provided in this document are only applicable when the STM32MP15x decoupling scheme and layout recommendations are carefully followed.
■Power consumption figures provided in this application note are illustrative examples only, and should not be used as a reference. For information regarding power consumption.
■The STM32MP15x electrical and timing data provided in this application note is for illustration only, and should not be used as reference. Please refer to the relevant STM32MP15x product datasheet.
■lpDDR2 and lpDDR3 memories are not within the scope of this application note. It is assumed that they are not powered by power discrete regulators for the following reasons:
◆lpDDR2/3 memories have strict power-up and power-down sequence constraints (referring to JEDEC specification), which is complex to implement with discrete regulator circuitry
◆Low-power management with discrete regulators is more complex than using a power management IC, such as the STPMIC1.
■STM32MP15x products are Arm®(a) Cortex®-based devices.
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STM32MP151 、 STM32MP153 、 STM32MP157 、 STM32MP15x 、 STPMIC1 |
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Application note & Design Guide |
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Please see the document for details |
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English Chinese Chinese and English Japanese |
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14-Feb-2020 |
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Rev 2 |
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AN5256 |
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867 KB |
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