CoreCORDIC v4.0 Release Notes

2021-11-25
●This document accompanies the production release of CoreCORDIC v4.0 IP core. It describes the features, enhancements, system requirements, supported families, implementations, known issues and workarounds, and resolved issues of previous version.
●Key Features:
■CoreCORDIC has the following key features:
▲Parameterizable RTL generator
▲Functional modes:
◆General vector rotation
◆Conversion from Polar to Rectangular co-ordinates
◆Translation from Rectangular to Polar co-ordinates
◆Sine and Cosine calculation
◆Arctangent (angle) calculation
▲Configurable 8 to 48 bits input and output data bit resolution
▲Automatic or user-controllable precision of internal calculations up to 48 bits
▲Variety of output rounding options:
◆Truncation
◆Convergent rounding (round to nearest even)
◆Symmetric rounding (round to positive or negative infinity)
◆Round up (round to positive infinity)
▲Word-serial architecture for smaller area
▲Parallel architecture for high throughput
▲Configurable number of iterations up to 48
▲Synchronous design using a single clock

MICROSEMI

CoreCORDIC

More

Part#

More

More

Development Environment(Software/Firmware)

More

More

Please see the document for details

More

More

English Chinese Chinese and English Japanese

May 2015

90 KB

- The full preview is over. If you want to read the whole 6 page document,please Sign in/Register -
  • +1 Like
  • Add to Favorites

Recommend

All reproduced articles on this site are for the purpose of conveying more information and clearly indicate the source. If media or individuals who do not want to be reproduced can contact us, which will be deleted.

Contact Us

Email: