MPC603/MPC604 Evaluation System—Big Bend Technical Summary

2021-11-24
●This document describes an evaluation system that demonstrates the capabilities of two PowerPC™ microprocessors—the MPC603 or MPC604. The system, named Big Bend, is a PowerPC Reference Platform (PReP) compliant design. The motherboard inside the Big Bend system is an 8-layer PCB design, baby AT-size (9-inch x 13-inch) form factor, and uses the MPC105 processor to PCI bridge device for core logic. Other major components on the motherboard include the UMC PCI-ISA bridge, National Semiconductor's Super I/O controllers, and NCR's SCSI controller. Big Bend provides an example that can be used in designing other systems using PowerPC microprocessors. In addition to the Big Bend evaluation system, an evaluation kit containing design information and a manufacturing kit containing in-depth manufacturing information are available.
●System Features:
■The main features of the Big Bend system are as follows:
◆PReP compliant MPC603/MPC604 evaluation system;
◆Desktop system in baby AT form factor;
◆Supports MPC603 and MPC604 with external bus speeds up to 66 MHz;
◆Processor to PCI bridge with Motorola MPC105;
◆PCI to ISA bridge with UMC UM8886;
◆Onboard National Semiconductor PC87323 super I/O chip supports two 16550 serial ports, one parallel port, floppy, keyboard, mouse, and IDE interface.
◆Onboard NCR53C825 SCSI controller to support the SCSI hard drive and CD ROM;
◆High performance PCI graphics;
◆Second-level cache selectable between 256 Kbyte, 512 Kbyte or 1 Mbyte;
◆Supports onboard DRAM up to 128 Mbyte; support for 4-Mbyte, 8-Mbyte, 16-Mbyte, and 32-Mbyte SIMMs;
◆Three 16-bit ISA bus slots and three 32-bit PCI bus slots;
◆Standard 101 PS/2™-style keyboard;
◆Supplied with Windows NT™ operating system and selected applications pre-installed on hard drive.

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MPC603MPC604MPC105EVB/D

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Evaluation Systemmicroprocessors

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2020/03/24

MPC105EVB/D

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