MPC5606E Microcontroller Data Sheet
■Single issue, 32-bit CPU core complex (e200z0h).
◆Compliant with Power Architecture® embedded category;
◆Variable Length Encoding (VLE) only;
■Memory:
◆512 KB on-chip Code Flash with ECC and erase/program controller;
◆additional 64 (4 × 16) KB on-chip Data Flash with ECC for EEPROM emulation;
◆96 KB on-chip SRAM with ECC.
■Fail-safe protection:
◆Programmable watchdog timer;
◆Non-maskable interrupt;
◆Fault collection unit;
■Nexus 2+ interface;
■Interrupts and events;
◆16-channel eDMA controller;
◆16 priority level controller;
◆Up to 32 external interrupts for 100-pin LQFP1;
◆Upto 22 external interrupts for 64-pin LQFP;
◆PIT implements four 32-bit timers;
◆120 interrupts are routed via INTC;
■General purpose I/Os;
◆Individually programmable as input, output or special function;
◆39 on LQFP64;
◆71 on LQFP1001;
■1 general purpose eTimer unit:
◆6 timers each with up/down capabilities;
◆16-bit resolution, cascadeable counters;
◆Quadrature decode with rotation direction flag;
◆Double buffer input capture and output compare;
■Communications interfaces:
◆2 LINFlex channels (1 × Master/Slave, 1 × Master Only);
◆3 DSPI controllers with automatic chip select generation (up to 2/2/4 chip selects);
◆1 FlexCAN interface (2.0B Active) with 32 message buffers;
■One 10-bit analog-to-digital converter (ADC):
◆7 input channels:
★4 channels routed to the pins;
★3 internal connections: 1x temperature sensor, 1x core voltage, 1x IO voltage;
◆Conversion time < 1 s including sampling time at full precision;
◆4 analog watchdogs with interrupt capability;
■On-chip CAN/UART bootstrap loader with Boot Assist Module (BAM);
■On-chip TSENS;
■100 MBit Fast Ethernet Controller (FEC):
◆Supports precision timestamps;
■JPEG/MJPEG 8/12bit Encoder;
■6 x stereo channels audio interface;
■2x I²C controller module;
■CRC module.
●Overview:
■This document provides electrical specifications, pin assignments, and package diagrams for the MPC5606E series of microcontroller units (MCUs).
■MPC5606E microcontrollers are members of a new family of next generation microcontrollers built on the Power Architecture. This document describes the features of the family and options available within the family members, and highlights important electrical and physical characteristics of the devices.
■The MPC5606E microcontroller is a gateway system designed to move data from different sources via Ethernet to a receiving system and vice versa. The supported data sources and sinks are:
◆Video data (with 8/10/12 bits per data word);
◆Audio data (6× stereo channels);
◆RADAR data (2 × 12 bit with <1μs per sample, digitized externally and read in via SPI);
◆Other serial communication interfaces including CAN, LIN, and SPI.
■The Ethernet module has a bandwidth of 10/100 Mbits/sec and supports precision time stamps (IEEE1588). Unshielded twisted pair cables are used to transfer data (via Ethernet) in the car, resulting in a significant reduction of wiring costs by providing inexpensive high bandwidth data links.
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Datasheet |
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Please see the document for details |
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MAPBGA |
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English Chinese Chinese and English Japanese |
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11/2019 |
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Rev. 4 |
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MPC5606E |
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1.4 MB |
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