DS2141A T1 Controller data sheet
■DS1/ISDN-PRI framing transceiver
■Frames to D4, ESF, and SLC-96 formats
■Parallel control port
■Onboard, dual two-frame elastic store slip buffers
■Extracts and inserts robbed-bit signaling
■Programmable output clocks
■Onboard FDL support circuitry
■5V supply; low-power CMOS
■Available in 40-pin DIP and 44-pin PLCC(DS2141Q)
■Compatible with DS2186 Transmit Line Interface, DS2187 Receive Line Interface,DS2188 Jitter Attenuator, DS2290 T1 Isolation Stik, and DS2291 T1 Long Loop Stik
●DESCRIPTION
■The DS2141A is a comprehensive, software-driven T1 framer. It is meant to act as a slave or coprocessor to a microcontroller or microprocessor. Quick access via the parallel control port allows a single micro to handle many T1 lines. The DS2141A is very flexible and can be configured into numerous orientations via software. The software orientation of the device allows the user to modify their design to conform to future T1 specification changes. The controller contains a set of 62 8-bit internal registers which the user can access. These internal registers are used to configure the device and obtain information from the T1 link. The device fully meets all of the latest T1 specifications including ANSI T1.403-1989, AT&T TR 62411 (12-90), and CCITT G.704 and G.706.
●DS2141A FEATURES
■Parallel control port
■Large error counters
■Onboard dual 2-frame elastic store
■FDL support circuitry
■Robbed-bit signaling extraction and insertion
■Programmable output clocks
■Fully independent transmit and receive sections
■Frame sync generation
■Error-tolerant yellow and blue alarm detection
■Output pin test mode
■Payload loopback capability
■SLC-96 support
■Remote loop up/down code detection
■Loss of transmit clock detection
■Loss of receive clock detection
■1's density violation detection
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Datasheet |
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Please see the document for details |
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DIP;PLCC |
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English Chinese Chinese and English Japanese |
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112099 |
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470 KB |
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