DS1267 Dual Digital Potentiometer Chip
■The DS1267 Dual Digital Potentiometer Chip consists of two digitally controlled, solid-state potentiometers. Each potentiometer is composed of 256 resistive sections. Between each resistive section and both ends of the potentiometer are tap points which are accessible to the wiper. The position of the wiper on the resistive array is set by an 8-bit value that controls which tap point is connected to the wiper output. Communication and control of the device are accomplished via a 3-wire serial port interface. This interface allows the device wiper position to be read or written.
■Both potentiometers can be connected in series (or stacked) for an increased total resistance with the same resolution. For multiple-device. single-processor environments. the DS1267 can be cascaded or daisy-chained. This feature provides for control of multiple devices over a single 3-wire bus.
■The DS1267 is offered in three standard resistance values which include 10, 50, and 100-kohm versions. Available packages for the device include a 14-pin DIP, 16-pin SOIC, and 20-pin TSSOP.
●FEATURES
■Ultra-low power consumption, quiet, pumpless design
■Two digitally controlled, 256-position potentiometers
■Serial port provides means for setting and reading both potentiometers
■Resistors can be connected in series to provide increased total resistance
■14-pin DIP, 16-pin SOIC, 20-pin TSSOP packages
■Resistive elements are temperature compensated to ±0.3 LSB relative linearity
■Standard resistance values:
▲DS1267-10 ~ 10 kΩ
▲DS1267-50 ~ 50 kΩ
▲DS1267-100 ~ 100 kΩ
■Operating Temperature Range:
▲Industrial: -40°C to +85°C
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DS1267 、 DS1267-010 、 DS1267-050 、 DS1267-100 |
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Datasheet |
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Please see the document for details |
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SOIC;DIP;TSSOP |
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English Chinese Chinese and English Japanese |
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102199 |
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312 KB |
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