RF Front End Module Architectures for 5G
■Worldwide adoption of 3G/4G smartphones for more than 5 billion of people has been one of the main driving engine behind semiconductor industry. 5G is expected to bring higher data capacity, low latency and new RF hardware enhancements which will open the market for new application where our smartphones will be a conduit. CMOS lower features nodes as FinFET 7nm/14nm CMOS allow the computational power and lower power consumption required for the use of digital signal processing and RF digital calibration which are essential for 4G/5G modem and application processor technology. The goal of having a single die for the entire 4G/5G functionality has faded away to a more realistic partitioning where many RF and analogue blocks are integrated with other components such as RF acoustic filters in multiple RF front-end-modules. This paper presents RF front end architectures which will be part of 5G smartphones together with circuit and measurement detail.
Keywords
RF front end (RFFE), front end module (FEM), switch, power management IC (PMIC), GSM, 3G, 4G, 5G, GPS, long term evolution (LTE), new radio (NR), user equipment (UE), WiFi, CMOS, GaAs, SiGe, silicon on insulator (SOI), duplexer, filter, diplexer, multimode multiband power amplifier (MMBPA), frequency division duplex (FDD), time division duplex (TDD), carrier aggregation (CA), MIMO, digital signal processing (DSP), RF transmit (Tx), RF receive (Rx), multi-chip-module (MCM), licensed-assisted access (LAA), enhanced LAA (eLAA), adjacent channel leakage power (ACLR), internet of things (IoT), uplink (UL), downlink (DL), serial parallel interface (SPI), error vector magnitude (EVM), digital signal processing (DSP).
[ 5G ][ vehicle-to-vehicle (V2X) communications ][ factory automation ][ self-driving vehicles ][ IoT ][ smartphones ] |
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Please see the document for details |
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English Chinese Chinese and English Japanese |
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2019 |
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1.9 MB |
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