DS2152 Enhanced T1 Single-Chip Transceiver

2021-06-21
●The DS2152 T1 enhanced single-chip transceiver (SCT) contains all the necessary functions for connection to T1 lines, whether they be DS-1 long haul or DSX-1 short haul. The clock recovery circuitry automatically adjusts to T1 lines from 0 feet to over 6000 feet in length. The device can generate both DSX-1 line build-outs as well as CSU line build-outs of -7.5dB, -15dB. and -22.5dB. The on-board jitter attenuator (selectable to either 32 bits or 128 bits) can be placed in either the transmit or receive data paths. The framer locates the frame and multiframe boundaries and monitors the data stream for alarms. It is also used for extracting and inserting robbed-bit signaling data and FDL data. The device contains a set of internal registers that the user can access and control the operation of the unit. Quick access via the parallel control port allows a single controller to handle many T1 lines. The device fully meets all the latest T1 specifications including ANSI T1.403-1995, ANSI T1.231-1993, AT&T TR 62411 (12-90), AT&T TR54016, and ITU G.703, G.704, G.706, G.823, and 1.431.
●The DS2152 is a superset version of the popular DS2151 T1 single-chip transceiver offering the new features listed below. All of the original features of the DS2151 have been retained and software created for the oriainal devices is transferable into the DS2152.
●FEATURES
■Complete DS1/ISDN-PRI Transceiver Functionality
■Line Interface can Handle Both Long- and Short-Haul Trunks
■32-Bit or 128-Bit Crystal-Less Jitter Attenuator
■Generates DSX-1 and CSU Line Build-Outs
■Frames to D4, ESF, and SLC-96R Formats
■Dual On-Board Two-Frame Elastic Store Slip Buffers That can Connect to Asynchronous Backplanes Up to 8.192MHz
■8-Bit Parallel Control Port That can be Used Directly on Either Multiplexed or Nonmultiplexed Buses (Intel or Motorola)
■Extracts and Inserts Robbed-Bit Signaling
■Detects and Generates Yellow (RAI) and Blue (AIS) Alarms
■Programmable Output Clocks for Fractional T1
■Fully Independent Transmit and Receive Functionality
■Integral HDLC Controller with 16-Byte Buffers for the FDL
■Generates and Detects In-Band Loop Codes from 1 to 8 bits in Length Including CSU Loop Codes
■Contains ANSI Ones Density Monitor and Enforcer
■Large Path and Line Error Counters Including BPV, CV, CRC6, and Framing Bit Errors
■Pin Compatible with DS2154 E1 Enhanced Single-Chip Transceiver
■5V Supply; Low-Power CMOS
■100-Pin, 14mm2 LQFP Package

Maxim

DS2152DS2152LDS2152L+DS2152LNDS2152LN+

More

Part#

Enhanced T1 Single-Chip TransceiverT1 enhanced single-chip transceiverT1 enhanced SCT

More

More

Datasheet

More

More

Please see the document for details

More

More

LQFP

English Chinese Chinese and English Japanese

011706

1.2 MB

- The full preview is over. If you want to read the whole 97 page document,please Sign in/Register -
  • +1 Like
  • Add to Favorites

Recommend

All reproduced articles on this site are for the purpose of conveying more information and clearly indicate the source. If media or individuals who do not want to be reproduced can contact us, which will be deleted.

Contact Us

Email: