74LVC2T45-Q100;74LVCH2T45-Q100 Dual supply translating transceiver; 3-state Product data sheet
■The 74LVC2T45-Q100; 74LVCH2T45-Q100 are dual bit, dual supply translating transceivers with3-state outputs that enable bidirectional level translation. They feature two 2-bits input-output ports(nA and nB), a direction control input (DIR) and dual supply pins (V-CC(A) and V-CC(B)). Both V-CC(A)and V-CC(B) can be supplied at any voltage between 1.2 V and 5.5 V making the device suitable fortranslating between any of the low voltage nodes (1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and 5.0 V). PinsnA and DIR are referenced to V-CC(A) and pins nB are referenced to V-CC(B). A HIGH on DIR allowstransmission from nA to nB and a LOW on DIR allows transmission from nB to nA.
■The devices are fully specified for partial power-down applications using I-OFF. The I-OFF circuitrydisables the output, preventing any damaging backflow current through the device when it ispowered down. In suspend mode when either V-CC(A) or V-CC(B) are at GND level, both A port andB port are in the high-impedance OFF-state.
■Active bus hold circuitry in the 74LVCH2T45-Q100 holds unused or floating data inputs at a validlogic level.
■This product has been qualified to the Automotive Electronics Council (AEC) standard Q100(Grade 1) and is suitable for use in automotive applications.
● Features and benefits
■Automotive product qualification in accordance with AEC-Q100 (Grade 1)
▲Specified from -40 °C to +85 °C and from -40 °C to +125 °C
■Wide supply voltage range:
▲VCC(A): 1.2 V to 5.5 V
▲VCC(B): 1.2 V to 5.5 V
■High noise immunity
■Complies with JEDEC standards:
▲JESD8-7 (1.2 V to 1.95 V)
▲JESD8-5 (1.8 V to 2.7 V)
▲JESD8C (2.7 V to 3.6 V)
▲JESD36 (4.5 V to 5.5 V)
■ESD protection:
▲MIL-STD-883, method 3015 Class 3A exceeds 4000 V
▲HBM JESD22-A114F Class 3A exceeds 4000 V
▲MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
■Maximum data rates:
▲420 Mbps (3.3 V to 5.0 V translation)
▲210 Mbps (translate to 3.3 V))
▲140 Mbps (translate to 2.5 V)
▲75 Mbps (translate to 1.8 V)
▲60 Mbps (translate to 1.5 V)
■Suspend mode
■Latch-up performance exceeds 100 mA per JESD 78 Class II
■±24 mA output drive (VCC = 3.0 V)
■Inputs accept voltages up to 5.5 V
■Low power consumption: 16 μA maximum I-CC
■I-OFF circuitry provides partial Power-down mode operation
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74LVC2T45-Q100 、 74LVC2T45DC-Q100 、 74LVCH2T45DC-Q100 、 74LVC2T45GT-Q100 、 74LVC2T45GS-Q100 |
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Datasheet |
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Please see the document for details |
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VSSOP8;XSON8;SOT765-1;SOT833-1;SOT1203;MO-187;MO-252 |
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English Chinese Chinese and English Japanese |
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11 May 2021 |
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Rev. 4 |
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74LVC_LVCH2T45_Q100 v.4 |
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383 KB |
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