EPC2207 EPC eGaN® FET Qualification Report
EPC’s eGaN FETs were subjected to a wide variety of stress tests under conditions that are typical for silicon-based power MOSFETs. These tests included:
– High temperature reverse bias (HTRB): Parts are subjected to a drain-source voltage at the maximum rated temperature
– High temperature gate bias (HTGB): Parts are subjected to a gate
-source voltage at the maximum rated temperature
– High temperature storage (HTS): Parts are subjected to heat at the maximum rated temperature
– Temperature cycling (TC): Parts are subjected to alternating high- and low temperature extremes– High temperature high humidity reverse bias (H3TRB): Parts are subjected to humidity under high temperature with a drain-source voltage applied.
All The stability of the devices is verified with DC electrical tests after stress biasing. The electrical parameters are measured at time-zer and at interim readout points at room temperature. Electrical parameters such as the gate-source leakage,drain-source leakage, gate-source threshold voltage, and on-state resistance are compared against the data sheet specifications.A failure is recorded when a part exceeds the datasheet specifications. eGaN FETs are stressed to meet the latest Joint Electron Device Engineering Council (JEDEC) standards when possible.
Parts for all tests except for TC were mounted onto FR5 (high Tg FR4) or polyimide adaptor cards. Adaptor cards of 1.6 mm in thickness with two copper layers were used.The top copper layer was 1 oz. or 2 oz.,and the bottom copper layer was 1 oz. Kester NXG1 type 3 SAC305 solder no clean flux was used in mounting the part onto an adaptor card.
Scop：
The testing matrix in this qualification report covers the qualification of EPC2207 listed in the table below.
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Test Report |
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Please see the document for details |
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English Chinese Chinese and English Japanese |
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2020/09/08 |
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146 KB |
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