Keysight D9030DDRC DDR3 Compliance Test Application

PublishTime：2020-11-11

This manual describes the tests that are performed by the DDR3 Compliance Test in more detail; it contains information from (and refers to) the JEDEC specifications, and it describes how the tests are performed.
• Chapter 1, “Installing the DDR3 Compliance Test Application" shows how to install and license the automated test application software (if it was purchased separately).
• Chapter 2, “Preparing to Take Measurements" shows how to start the DDR3 Compliance Test and gives a brief overview of how it is used.
• Chapter 3, “Clock Plus Tests Group" describes the VSEH and VSEL tests for Clock Plus signals and the AC overshoot and undershoot tests probing and method of implementation.
• Chapter 4, “Clock Minus Tests Group" describes the VSEH and VSEL tests for Clock Minus signals and the AC overshoot and undershoot tests probing and method of implementation.
• Chapter 5, “Clock Plus and Minus Cross Point Tests Group" describes the VIX test for Clock Plus and Minus Point.
• Chapter 6, “Clock Differential Tests Group" shows how to run various Electrical Test, Timing Tests at AC Level, Timing Tests for Rising Edge Measurement and Timing Tests for Pulse Measurement.
• Chapter 7, “Strobe Plus Tests Group" describes the VSEH and VSEL tests for Strobe Plus signals and the AC overshoot and undershoot tests probing and method of implementation.
• Chapter 8, “Strobe Minus Tests Group" describes the VSEH and VSEL tests for Strobe Minus signals and the AC overshoot and undershoot tests probing and method of implementation.
• Chapter 9, “Strobe Plus and Minus Cross Point Tests Group" describes the VIX test for strobe plus and minus point.
• Chapter 10, “Strobe Differential Tests Group" shows how to run various Electrical Test and Timing Tests.
• Chapter 11, “Data Tests Groups" shows how to run various Write Cycles and Read Cycles.
• Chapter 12, “Data Mask Tests Group" describes how to run the data mask timing tests.
• Chapter 13, “Command,Address Tests Group" describes the command and address timing testswhich include the address and control input setup time as well as the address and control inputhold time.
• Chapter 14, “Chip Select Tests Group" describes how to run the chip select tests.
• Chapter 15, “Clock Enable Tests Group" describes how to run the clock enable tests.See Also
• The D9030DDRC DDR3 Compliance Test’s Online help, which describes:
• D9030DDRC DDR3 Automated Testing—At a Glance
• Starting the D9030DDRC DDR3 Test Application
• Creating or Opening a Test Project
• Setting Up the Test Environment
• Selecting Tests
• Configuring Tests
• Verifying Physical Connections
• Running Tests
• Configuring Automation in the Test Application
• Viewing Results
• Viewing HTML Test Report
• Exiting the Test Application
• Additional Settings in the Test App

Brand of Product：	Keysight
Part#：	D9030DDRC More Part#
Product Category：	DDR3 Compliance Test Application software More
Application：	More
Data Type：	User's Guide More
Safety & Environment Standards：	More
Operating Temperature：	Please see the document for details
Qualification Grade：	More
Qualification Approval：	More
Package：
Language：	English Chinese Chinese and English Japanese
Date of Creation：	June 2019
Version Number：
Data Encoding：
Data Size：	12.5 MB

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