Si5332 Reference Manual
The Si5332 is a high-performance, low-jitter clock generator capable of synthesizing five independent banks of user-programmable clock frequencies up to 333.33 MHz, while providing up to 12 differential or 24 single-ended output clocks. The Si5332 supports free run operation using an external crystal, or optional internal crystal, as well as lock toan external clock signal. The output drivers are configurable to support common signal formats, such as LVPECL, LVDS, HCSL, and LVCMOS. Separate output supply pins al-low supply voltages of 3.3, 2.5, 1.8 V and 1.5V (CMOS only) to power the multi-formatoutput drivers. The core voltage supply (VDD) accepts 3.3, 2.5, or 1.8 V and is inde-pendent from the output supplies (VDDOs). Using its two-stage synthesis architecture and patented high-resolution Multisynth technology, the Si5332 can generate three fully independent / non-harmonically-related bank frequencies from a single input frequency.
KEY FEATURES:
• Any-Frequency 6/8/12-output programmable clock generators
•Offered in three different package sizes,supporting different combinations of out-put clocks and user configurable hardware input pins
• 32-pin QFN/LGA, up to 6 outputs
• 40-pin QFN/LGA, up to 8 outputs
• 48-pin QFN/LGA, up to 12 outputs
• Multisynth technology enables any frequency synthesis on any output up to 250 MHz
• Highly configurable output path featuring a cross point mux
• Up to three independent fractional synthesis output paths
• Up to five independent integer dividers
• Down and center spread spectrum
• Embedded 50 MHz crystal option
• Input frequency range:
• External crystal: 16 to 50 MHz
• Embedded crystal: 50 MHz
• Differential clock: 10 to 250 MHz
• LVCMOS clock: 10 to 170 MHz
• Output frequency range:
• Differential: 5 to 312.5 MHz
• LVCMOS: 5 to 170 MHz
• User-configurable clock output signal format per output: LVDS, LVPECL, HCSL, LVCMOS
• Easy device configuration using our ClockBuilder Pro™ (CBPro) software tool available for download from our web site
• Temperature range: –40 to +85 °C (Lgrade: +25 C to +85 C)
• Pb-free, RoHS-6 compliant
• For more information, refer to the Si5332 data sheet
In addition to clock generation, the input clocks can bypass the synthesis stage enabling the Si5332 to be used as a high-performance clock buffer or a combination of a buffer and generator. The Multisynth dividers have two sets of divide ratio registers, an A set and a Bset. The active in-use divide ratio can be switched between the A set or B set via external input pin or register control. This feature allows for dynamic frequency shifting at ppb accuracy for applications such as frequency margining. Similar A set and B set divider ratios are available for the integer dividers, but the ratios must be integer related. CBPro supports use of A and B divider sets. Spread spectrum is available for any clock output from two Multisynth dividers for use in EMI-sensitive applications, such as PCI Express. Con-figurations and controls of the Si5332 are mainly handled through I2C. Any GPI pin can be programmed to be clock input select, fre-quency A/B select, spread enable, output enable, or I2C address select.
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Si5332 、 Si5332E 、 Si5332F 、 Si5332G 、 Si5332H 、 Si5332L 、 Si5332A 、 Si5332B 、 Si5332C 、 Si5332D |
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User's Guide |
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Please see the document for details |
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QFN;LGA |
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English Chinese Chinese and English Japanese |
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Rev. 0.4 |
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2.2 MB |
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