DS3104-SE Line Card Timing IC with Synchronous Ethernet Support
●The DS3104-SE is a low-cost,feature-rich timing IC for line cards with Synchronous Gigabit Ethernet (GbE) 10-Gigabit Ethernet (10GbE),and Fast Ethemet ports. ITU-T recommendation G.8261 (formerly G.pactiming) specifies that network synchronization can be camried over packet links by synchronizing the bit clock of the physical layer as is currently done on SONET/SDH links.The DS3104-SE enables synchronization in Ethernet line cards in both the transmit and receive directions.
●In the transmit direction,the device accepts traditional SONET/SDH system clocks such as 19.44MHz from redundant system timing cards and synthesizes frequency-locked xMll clock rates,such as the 125MHz GTX CLK for GbE GMIIs.Each Ethernet PHY then synthesizes a transmit bit clock that is frequency-locked to the xMll clock,and thus to the system clock and network clock.In the receive direction,each PHY divides down the recovered bit clock to produce the receive xMlI clock.The DS3104-SE accepts the xMIl clock from any of several Ethernet ports and forwards a frequency-locked system clock,such as 19.44MHz,to the system timing cards.SONET/SDH ports are also supported.
●Features
■Timing Card to Line Card Path
◆Two Input Clocks from Master and Slave Timing Cards (LVDS/LVPECL or CMOS/TTL)
◆Optional Frame-Sync Inputs and Outputs
◆Continuous Input Clock Quality Monitoring
◆Hitless Reference Switching,Automatic or Manual
◆Holdover on Loss of All Inputs
◆Programmable PLL Bandwidth,0.1Hz to 400Hz
◆Frequency Conversion Between SONET/SDH
◆Rates and Ethemet MIl/GMIl/XGMII Rates
◆Up to 7 Output Clocks:3 CMOS/TTL (s 125MHz) 2 LVDS/LVPECL (s 312.50MHz),and 2 Dual CMOS/TTL and LVDS/LVPECL
■Line Card to Timing Card Path
◆Up to 8 Input Clocks:4 CMOS/TTL (s 125MHz) and 4 LVDS/LVPECL/CMOS/TTL (s 156.25MHz)
◆Hitless Reference Switching,Automatic or Manual
◆Frequency Conversion Between Ethernet MII/GMII/XGMII and SONET/SDH Rates
◆Two Output Clocks to Master and Slave Timing Cards(CMOS/TTL or LVDS/LVPECL)
■General
◆Suitable Line Card IC for Stratum 3/3E/4,SMC, SEC
◆Numerous Input Clock Frequencies Supported Ethernet xMll:2.5,25,125,156.25MHz S0NET/SDH:6.48,N×19.44,NX51.84MHz PDH:Nx DS1,Nx E1.Nx DS2.DS3.E3 Frame Sync:2kHz,4kHz,8kHz Custom:Any Multiple of 2kHz Up to 131.072MHz Any Multiple of 8kHz Up to 155.52MHz
◆Numerous Output Clock Frequencies Supported Ethernet×Ml:2.5,25,125,156.25,312.5MHz S0NET/SDH6.48,N×19.44,N×51.84MHz PDH:N×DS1,N×E1,NXDS2,DS3,E3 0ther:10,10.24,13,30.72MHz Frame Sync:2kHz,8kHz Custom Clock Rates:Any Multiple of 2kHz Up to 77.76MHz,Any Multiple of 8kHz Up to 311.04MHz.Any Multiple of 10kHz Up to 388.79MHz
◆Internal Compensation for Master Clock Oscillator
◆SPI™ Processor Interface
◆1.8V Operation with 2.5V/3.3V l/O (5V Tolerant)
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Datasheet |
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Please see the document for details |
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CSBGA |
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English Chinese Chinese and English Japanese |
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April 2012 |
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5.4 MB |
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