DUAL-PORT SRAM SIMPLIFIES PC-TO-TMS320 INTERFACE APPLICATION NOTE

2022-05-17

This application note describes a “no hassles” interface between the IBM PC-style backplane and a TMS320C30 DSP chip via an IDT dualport static RAM. The interface provides an extremely simple means of downloading cross-compiled DSP code as well as sample data sets for debugging a high speed TMS320 based system in real time.
This example also shows how easily interprocessor communications hardware can be implemented via the simple insertion of a dual-port SRAM between a DSP chip and a general purpose processor in a standard DSP system. A system like this one would typically use a standard CPU for data input/output and ordering, and would pass complete data sets to the DSP chip for intense calculation. Similar architectures are often used in graphics and image processing, where an entire image is manipulated as a single data set, in transform calculations (i.e. FFTs) for sonar and radar processing. Certain systems even use this scheme several times with numerous DSP chips in order to get processing speeds proportional to the number of DSP chips in the system.

IDT

TMS320C30PC-TO-TMS320TMS320IDT7134274LS37774ALS52174ALS623IDT71342S4574ALS54174AS08PAL20L8-15IDT71342S3574AS24474AS0474AS3274AS1174ALS74

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Application note & Design Guide

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MARCH 1999

AN-68

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