MR48V256C 32,768-Word×8-Bit FeRAM (Ferroelectric Random Access Memory)
in the ferroelectric process and silicon-gate CMOS technology. Unlike SRAMs, this device, whose cells are
nonvolatile, eliminates battery backup required to hold data. This device has no mechanisms of erasing and
programming memory cells and blocks, such as those used for various EEPROMs. Therefore, the write cycle
time can be equal to the read cycle time and the power consumption during a write can be reduced significantly.
The MR48V256C can be used in various applications, because the device is guaranteed for the write/read
tolerance of 1013 cycles per bit and the rewrite count can be extended significantly.
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32,768-Word x 8-Bit FeRAM (Ferroelectric Random Access Memory) |
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Datasheet |
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Please see the document for details |
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TSOP;TSOP28-08134-0.55-ZK6;TSOP128-08134-0.55-ZK6 |
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English Chinese Chinese and English Japanese |
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Nov.15,2018 |
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FEDR48V256C-04 |
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747 KB |
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