S1D13515 / S2D13515 Display Controller Hardware Functional Specification
This is the Hardware Functional Specification for the S1D13515/S2D13515 Display Controller. Included in this document are timing diagrams, AC and DC characteristics, register descriptions, and power management descrip-tions. This document is intended for two audiences: Video Subsystem Designers and Software Developers.
1.2 Overview Description:
The S1D13515/S2D13515 is a highly integrated color LCD graphics controller with external memory interface. The architecture is designed to meet the needs of automotive and embedded markets requiring a flexible LCD solution. For automotive applications, the S2D13515 has three primary target placements within a vehicle.
1. Heads-Up Display
2. Instrument Cluster
3. Center Console
The S1D13515/S2D13515 advances on the successes of other Epson LCD controllers by embedding a proprietary 32-bit RISC CPU and associated accelerator blocks to achieve an increase in flexibility and functionality over previous designs. Routines are provided allowing for audio playback, 2D BitBLT operations, warp and filtering before display operations, and the ability to offer OpenGL-ES 1.1 support. In particular, the warp functions make this an ideal solution for the automotive Heads-Up Display (HUD) market, or pseudo 3D navigation displays.The S1D13515/S2D13515 is an affordable, low power device which uses a flexible external SDRAM memory interface to provide its frame buffer. It supports a wide variety of CPU interfaces and LCD panel types, including Double Display panels, which makes it an excellent choice for instrumentation or center cluster applications. While focusing on the automotive market, the S1D13515/S2D13515’s impartiality to CPU type or operating system makes it an ideal display solution for a wide variety of other markets.
The S1D13515/S2D13515 design includes some of the following key features:
1. Warp engine for HUD projection correction
2. Embedded 32-bit proprietary RISC CPU
3. Support for two TFT Displays simultaneously
4. Support for Double Display LCD panels from Epson and Sharp
5. The ability to provide OpenGL-ES library functionality
6. The ability to playback audio
7. The ability to reset and display an image without the Host CPU involvement
Features:
2.1 Memory:
● Uses external SDRAM which is:
• Accessible by both the internal and Host CPUs
• Used for executable code, data, and the frame buffer
• Addressable through direct or indirect access modes
• Accessible linearly in configurable 4M byte paging windows (direct access mode)
● SDRAM Interface:
• SDRAM Clock Frequency: 100Mhz (typical)
• Supports x16 and x32 SDRAM interfaces (x32 is strongly recommended in most cases)
• Supports 8/16/32/64M bytes of 4 bank SDRAM
• Low power design
2.2 CPU Interfaces:
Note:
The S1D/S2D13515 supports Little Endian interface only.
● Direct and indirect interface support for the following CPU interfaces:
• Intel 80 Types 1 and 2 (8/16-bit)
• Renesas SH-4 (8/16-bit)
• FreeScale MPC555 PowerPC bus interface with burst and non-burst modes (16-bit Little Endian configuration only)
• NEC V850 Types 1 and 2 (8/16-bit)
• Texas Instruments TMS470 with burst mode (16-bit only)
• Marvell PXA3xx (16-bit Direct only)
• Serial Host Interface
• SPI
•I2C
2.3 Panel Interface Support:
• Single or Dual panels (dual panel implementations can have independent images)
● LCD1 supports:
• 12/16/18-bit interface for Generic TFT/TFD
• Optionally, LCD1 pins can be used for a second Camera / RGB data stream
● LCD2 supports:
• 12/16/18/24-bit interface for Generic TFT/TFD
• EID Double Screen panel
• Sharp DualView panel
● Optional Serial Command interface supports:
• a-Si TFT interface (8-bit)
• TFT w/u-Wire interface (16-bit)
• EPSON ND-TFD 4 pin interface (8-bit)
• EPSON ND-TFD 3 pin interface (9-bit)
•24-bit serial
● Panel Resolution Examples:
• 800x480 + 320x240 @ 32 bpp, 60Hz
• 1024x768 @ 32 bpp, 60Hz
• TV-Out can be achieved by connecting an external TV encoder, such as the S1D13746, to the LCD outputs
2.4 Display Features:
● Four input window sources can be stored in SDRAM (Main/Aux/OSD/LCD Fetcher) and support:
• 8/16/24 bpp color depths
• Hardware / Software Double Buffer Frame Control
• Horizontal Flip
• Virtual Width
• Alpha Blending for the OSD
• Warp logic for HUD projection correction or other distortion compensation
• Processed image can be sent back to SDRAM
• Camera1 or Camera2 image can be stored in SDRAM and used for Main/Aux/OSD/LCD Fetcher/Warp/Sprite
•Interrupt
• Blending Engine can combine various input window sources for output
• Three input sources
• Input sources can be blended in four different ways
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S1D13515 、 S2D13515 、 MPC555 、 TMS470 、 PXA3xx 、 S1D13746 、 S1D13515B00B 、 S2D13515B00B 、 S1D13515F00A 、 S2D13515F00A 、 S2D13515F00A1 、 S1D13515F00A1 、 TSM470 |
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User's Guide |
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Please see the document for details |
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PBGA1U;QFP22 |
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English Chinese Chinese and English Japanese |
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March 15, 2018 |
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Rev. 1.8 |
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X83A-A-001-01.8 |
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27.1 MB |
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