DDR3 SDRAM Mini-RDIMM MT18JSF51272PKZ – 4GB
that use internally configured 8-bank DDR3 SDRAM devices. DDR3 SDRAM modules
use DDR architecture to achieve high-speed operation. DDR3 architecture is essentially
an 8n-prefetch architecture with an interface designed to transfer two data words
per clock cycle at the I/O pins. A single read or write access for the DDR3 SDRAM module
effectively consists of a single 8n-bit-wide, one-clock-cycle data transfer at the internal
DRAM core and eight corresponding n-bit-wide, one-half-clock-cycle data transfers
at the I/O pins.
DDR3 modules use two sets of differential signals: DQS, DQS# to capture data and CK
and CK# to capture commands, addresses, and control signals. Differential clocks and
data strobes ensure exceptional noise immunity for these signals and provide precise
crossing points to capture input signals.
MT18JSF51272PK(I)Z-1G6__ 、 MT18JSF51272PK(I)Z-1G4__ 、 MT18JSF51272PK(I)Z-1G1__ 、 MT18JSF51272PKIZ-1G6 、 MT18JSF51272PKIZ-1G4 、 MT18JSF51272PKIZ-1G1 、 MT18JSF51272PKZ-1G6 、 MT18JSF51272PKZ-1G4 、 MT18JSF51272PKZ-1G1 、 MT18JSF51272PKZ-1G4K1 、 MT18JSF51272PKZ |
|
|
|
Datasheet |
|
halogen-free |
|
Please see the document for details |
|
Commercial 、 Industrial |
|
|
|
|
|
English Chinese Chinese and English Japanese |
|
5/13 |
|
Rev. G |
|
|
|
660 KB |
- +1 Like
- Add to Favorites
Recommend
All reproduced articles on this site are for the purpose of conveying more information and clearly indicate the source. If media or individuals who do not want to be reproduced can contact us, which will be deleted.