LogiCORE IP CPRI v8.3 PB012
▼Introduction
◆The LogiCORE™ IP Common Public Radio Interface(CPRI™)core is a high-performance, low-cost flexible solution for implementation of the CPRI interface.The core can be implemented on UltraScale™ architecture,Zyng®-7000 All Programmable SoC and 7 series devices.It uses state-of-the-art GTXE2,GTPE2,GTHE2,and GTHE3 transceivers to implement the Physical Layer.A compact and customizable Data Link Layer is implemented in the FPGA logic.
▼Features
◆Designs implemented on UltraScale architecture-based,Zynq-7000,Virtex-7 and Kintex-7 devices operate at line rates of 614.4,1228.8,2457.6,3072,4915.2,6144, 9830.4,and 10137.6 Mb/s using GTXE2, GTHE2 or GTHE3 transceivers
◆Designs implemented on Artix-7 devices operate at line rates of 614.4,1228.8,2457.6, 3072,4915.2,and 6144 Mb/s using GTPE2 transceivers
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Datasheet |
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Please see the document for details |
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English Chinese Chinese and English Japanese |
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October 1, 2014 |
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v8.3 |
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PB012 |
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336 KB |
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