ANALOG IP BLOCK LVDS_RX - CMOS LVDS Receiver DATA SHEET
The LVDS_RX is a differential line receiver designed for applications requiring high data rates. The device supports data rates up to 1Gb/s (500MHz).
The LVDS_RX accepts (350mV) differential input signals and translates them to CMOS output levels.
With the companion line driver (LVDS_TX ) it provides a new alternative to high power pseudo-ECL devices for high speed applications.
The LVDS_RX requires the cell RXBIAS for biasing. RXBIAS can drive up to 3 LVDS_RX cells. An external voltage reference must be used.
The LVDS_RX is designed as pad cell and has the same high(y-size) as austriamicrosystems AG standard pad cells with separated substrate.
●FEATURES
■LVDS_RX area: 0.084mm2,LVDS_RX size: x = 241.1μm y = 345.7μm
■RXBIAS area: 0.08mm2,RXBIAS size: x = 332.4μm y = 239.3μm
■3.3V ± 10% supply voltage
■Accepts small swing (100mV) differential signal levels
■1Gb/s maximum transmission speed
■1.7ns maximum propagation delay
■Power dissipation 30mW at 3.3V, static, without RXBIAS
■Junction temperature –40 - 125° C
■Compatible with IEEE 1596.3 SCI LVDS standard except Common Mode Input Voltage range
■Internal 100Ω termination resistor
■Power down mode
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Datasheet |
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Please see the document for details |
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English Chinese Chinese and English Japanese |
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02.11.2004 |
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Revision E |
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268 KB |
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