PEX 8311 PCI Express to Generic Local Bus Bridge
●Multi-purpose and Feature-Rich PCI Express Bridge
■The bridge offers PCI Express™ (PCIe) bridging capability from a Generic Local Bus to PCIe enabling users to add scalable high bandwidth interconnection to a wide variety of applications including communication line cards, surveillance systems, video capture cards, industrial control, office automation, IP Media Servers, RAID systems and medical imaging. Many embedded system designs utilizing PCI today can easily migrate to PCIe. The ExpressLane™ PEX 8311 bridge can be used in Root Complex mode with the device directly interfacing multiple local bus devices including processors and FPGAs to a downstream PCIe port. The bridge can also function in an End Point type application connecting multiple local bus components to an upstream PCIe port.
●Features
■PEX 8311 General Features
◆PCI Express to Generic Local Bus Bridge
◆Root Complex and EndPoint Modes of Operation
◆Local Bus modes:
▼32-bit address & 32-bit data C Mode
▼Multiplexed 32-bit address/data J Mode
◆Local Bus Clock rates to 66MHz
◆Zero wait state bursts to 264 MB/sec
◆1 Lane PCI Express Port
◆2 DMA Channels
◆Integrated SerDes
◆21mmx21mm, 337 pin PBGA package
◆3.3V I/O and 5V tolerant Local Bus
◆Power: 1.0 Watt
■PEX 8311 Additional Features
◆Integrated PCI Express Interface
▼PCI Express Base Specification, r1.1
▼PCI Power Management Interface Specification r1.2
◆High Performance
▼Compliant to PCIe Specification, r1.0a
▼x1 Link, dual-simplex, 2.5 Gbps/direction
▼Auto Polarity reversal
▼128 Byte payload maximum
▼Link CRC support
▼Link/Device power management
▼Flow control buffering
▼PCIe transaction queues for eight outstanding TLPs
◆VGA/ISA Enable Registers
◆On-the-fly Endian conversion
◆Multiple DMA operational modes
▼Block and scatter/gather transfers
▼DMA descriptor ring management
▼Demand mode & EOT H/W controls
◆Direct Master data transfers
▼Read ahead and programmable read pre-fetch counter
▼Generate any PCIe transaction
◆Direct Slave data transfers
▼8-,16-, and 32-bit local bus access
▼Writes, read ahead, posted writes, programmable read pre-fetch counter
◆Control
▼Eight mailbox and two doorbell registers
▼Root Complex or EndPoint mode reset/interrupt
▼Serial EEPROM Interface
▼DC JTAG Boundary Scan
▼Four GPIO Pins, 1 GPO, 1 GPI
▼I2O Messaging Unit.
PCI Express to Generic Local Bus Bridge 、 Multi-purpose and Feature-Rich PCI Express Bridge |
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Datasheet |
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Please see the document for details |
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English Chinese Chinese and English Japanese |
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12/05 |
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Version 1.2 2005 |
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PEX8311-SIL-PB-P1-1.2 |
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1.9 MB |
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