APPLICATION NOTE

IDT CLOCK BUFFERS OFFER ULTRA LOW ADDITIVE PHASE JITTER

IDT™

IDT CLOCK BUFFERS OFFER ULTRA LOW ADDITIVE PHASE JITTER 1

REV A 092308

From the Computing and Multimedia Division of Integrated Device Technology, Inc.

Overview

High performance clock buffers are widely used in digital consumer and communications applications for distribution of

clock signals. A critical parameter for these buffers is Additive phase noise that can degrade system performance and

reliability. This application note briefly explains the theory behind measuring additive phase noise for IDT clock buffers and

summarizes the additive phase jitter results for several widely used IDT clock buffers. Other AC parameters of interest for

buffers are input to output propagation delay and output to output skew. For tighter skew requirements refer to the

application note on zero delay buffers

Introduction

In synchronous systems where timing and performance of the system is dependent on the clock, integrity of the clock signal

is important. Designers must optimize board layout, use clean power supplies and follow recommended decoupling and

termination schemes for the outputs in order to meet the EMI and timing budgets for their application.

IDT has a large variety of low skew clock distribution devices to meet all your application needs. Figure 1 shows a typical set

top box application where an IDT clock buffer is used to distribute 33 MHz PCI clocks to multiple PCI slots.

Figure 1. Set Top Box Application Diagram using IDT Clock Buffer

IDT CLOCK BUFFERS OFFER ULTRA LOW ADDITIVE PHASE JITTER APPLICATION NOTE

IDT™

IDT CLOCK BUFFERS OFFER ULTRA LOW ADDITIVE PHASE JITTER 2

REV A 092308

Phase Noise Measurement

Phase Noise is the frequency domain representation of fluctuations in the phase of a waveform due to jitter. It is measured

using a Phase Noise Analysis system such as Aeroflex and is usually expressed in dBc/Hz at various offsets from the

carrier frequency.

Figure 2. Block Diagram of PN-9000

Figure 2 shows a simplified block diagram of the Aeroflex PN-9000 system. The PN-9000 demodulates the phase

fluctuations of the source under measurement by means of a quadrature locked low noise reference signal. A balanced

mixer functions as a phase comparator and produces a signal which comprises of the time representation of the phase

fluctuations of the source. The reference is held in phase quadrature with respect to the DUT output frequency by means of

the control voltage produced by the phase locked loop. A low noise amplifier with auto-gain feature will adjust the noise level

to the optimum dynamic range of the digitizing board. The FFT calculation is done on a companion board located in the

computer to which the PN9000 system is connected to and the resulting phase noise is displayed on the monitor hooked up

to the computer.